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product structure : silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys . 1/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 tsz22111 ? 14 ? 001 www.rohm.com management ic for automotive microcontroller system regulator for microcontroller for automotive BD39012EFV-C general description bd 39012 e fv -c is a power management ic with 1 ch dc / dc convertor, 1 ch ldo, reset and watch dog timer. it can supply the power supply to module from battery directly. ldo has reset built- in and always watches that it supplies stable power supply to module. in addition, window watch dog timer is provided to detect the abnormality of the microcomputer. BD39012EFV-C enables a superior heat dissipation and a compact pcb design by htssop-b24 package. features ? synchronous rectifier step-down dc / dc converter with built- in fet (a djustable output) ? secondary ldo with built- in 5 v output fet ? monitoring function output over voltage / under voltage detection ( pg output) , reset function (ldo) window watchdog timer ? built-in protection function input under voltage protection (uvlo) thermal shut down (tsd) output over current protection (ocp) ? independent enable control ? htssop-b24 package applications ? microcontroller for automotive key specifications ? input voltage range : 4 v to 45 v (startup voltage needs to be above 4.5v.) ? output voltage accuracy step-down dc / dc converter fb voltage: 0.8 v 2 % secondary ldo: 5.0 v 2 % ? output ma ximum current step-down dc / dc converter: 1.0 a secondary ldo: 0.4 a ? operating frequency step-down dc / dc converter: 200 k to 600 khz (typ) ? standby current: 0 a (typ) ? operating temperature range: -40 c to +125 c package w(typ) x d(typ) x h(max) ht ssop-b24 7.80 mm x 7.60 mm x 1.00 mm htssop-b24 typical application circuit these specifications may be changed without a notice. (note 1) please connect when the application is that the load current of vo1 outp ut exceed in 500 ma. vreg vcc en 1 pvcc sw pgnd vo 1 vs vo 2 rst2 rstwd rt fb vo 1 comp vcc or vo 1 en 2 pg 1 pg 2 ct enwd open clk rtw gnd (note1) datashee t downloaded from: http:///
2/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C contents general description ........................................................................................................................................................................ 1 features .......................................................................................................................................................................................... 1 applications .................................................................................................................................................................................... 1 key specifications .......................................................................................................................................................................... 1 package .................................................................................................................................................................................. 1 typical application circuit ............................................................................................................................................................... 1 pin description ................................................................................................................................................................................ 3 block diagram ................................................................................................................................................................................ 4 description of blocks ...................................................................................................................................................................... 5 absolute maximum ratings ............................................................................................................................................................ 7 recommended operating conditions ............................................................................................................................................. 7 electrical characteristics ................................................................................................................................................................ . 8 typical performance curves ......................................................................................................................................................... 11 application example ..................................................................................................................................................................... 24 example of constant setting ........................................................................................................................................................ 24 notes for pattern layout of pcb .................................................................................................................................................... 24 selection of components externally connected ........................................................................................................................... 25 power dissipation ......................................................................................................................................................................... 32 i / o equivalent circuits ................................................................................................................................................................ . 33 operational notes ......................................................................................................................................................................... 35 ordering information ..................................................................................................................................................................... 37 marking diagrams ......................................................................................................................................................................... 37 physical dimension, tape and reel information ........................................................................................................................... 38 revision history ............................................................................................................................................................................ 39 downloaded from: http:///
3/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C pin configuration (top view) pin description pin no. pin name function pin no. pin name function 1 pvcc power vcc supply terminal 13 vo2 ldo output terminal 2 vcc signal vcc supply terminal 14 t2 test terminal (note1) 3 en1 e nable terminal (dc / dc) 15 en2 e nable terminal (ldo) 4 t1 test terminal (note1) 16 vs power supply input terminal for ldo 5 clk wdt clk input terminal 17 t3 test terminal (note1) 6 rstwd reset output terminal (wdt monitoring) 18 rtw frequency setting terminal for wdt 7 pg1 power good output terminal ( dc / dc monitoring) 19 vreg internal power supply terminal 8 pg2 power good output terminal (ldo monitoring) 20 rt frequency setting terminal for dc / dcl 9 enwd e nable terminal (wdt) 21 fb dc / dc output voltage f eed buck terminal 10 rst2 reset output terminal (ldo monitoring) 22 comp dc / dc error amp output terminal 11 ct power on reset time setting capacitor connect terminal 23 pgnd power gnd terminal 12 gnd signal gnd terminal 24 sw dc / dc output terminal (note 1) be sure to connect to ground. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 pvcc vcc en1 en2 t1 rtrtw pg1pg2 rst2 rstwd gnd sw pgnd t3 vreg fb comp clk enwd ct vo2 t2 vs downloaded from: http:///
4/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C block diagram err drv logi c v re g en 1 v cc v cc v re g cvre g rt os c_ dcdc v re g rrt uvlo v cc ts d1 v cc uvlo ts d1 v re g curre nt s ens e ocp v re g ocp p vcc sw p gnd cpv cca v re g s r current s ens e l1 cvo 1a cvo 1b vo 1 vs cvs vo 2 cvo 2 v re f2a vs vs v sov p lach releas e aft er c ount v re g cvcc ts d2 v sov p s lope pwm v re g v re g uvlo ts d1 ocp v sov p s cp v re g en 1 fb vo 1 cfb1 rfb1b rfb1a clk( dcdc ) comp ovd v re g rco 1 cco 1 v re g pg 1 uvlo en 1 v re f1b v cc lvd v re g sc p v re g rst 2 vo 2 p or vo 2 ovd vo 2 v re f2b vo 2 lvd vo 2 vo 2 pg 2 s cp l atc h release aft er count s cp v re g ocp en 2 v in or vo 1 pg 1 vo 2 pg 1 pg 2 vo 2 pg 2 ct cct vo 2 e nwd vo 2 vo 2 clk rtw rrtw1 os c_v out vo 2 clk( dcdc ) clk(wdt) rst wd vo 2 wdt gnd v re g s oft s tart v re g v re f1a v cc v re g s cp uvlo ts d1 ocp v sov p en 1 downloaded from: http:///
5/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C description of blocks ? internal power supply (vreg) it is the block which generates 4.0 v internal power supply vol tage. it is a power supply to supply to the ic inside. please do not be connected to the outside circuit. vreg needs to outside capacitor more than 1 f . low capacitor of the esr is recommended. ? enable (en1) the circuit becomes standby state when en1 pin becomes less tha n 0 .8 v. internal power supply and dc / dc convertor are off and consumption current from vcc becomes 0 a ( 25 c , typ) when standby state. it can be used when connected to vcc or inputted into the signal from a microcomputer. ? soft start (soft start) the soft start is a block to prevent over short of the output volta ge in the startup and inrush current to an output step. with controlling error amp input voltage and increasing switc hing pulse width gradually, it prevents then. because the soft start time operate an internal counter by oscilla tion frequency and decides time, it depends on the oscillation frequency setting of the dc / dc converter . it becomes 3.28 ms (typ) when oscillation frequency is 500 khz. it reboots after an internal ss pin is discharged when vsovp , tsd1 , and scp are detected. ? error amp (err) the error amp compares the output feedback voltage to the 0.8v refe rence voltage. this comparison result is output to comp pin as current. by the voltage of the comp pin, switching duty is decided. in the startup because soft start is taken, comp voltage is limited by soft start voltage. in addition, comp pi n needs to outside resistance and capacitor for phase compensation. ? pwm comp (pwm) pwm comparator makes a conversion to a continuous duty cycle to c ontrol an output transistor in the voltage of comp pin. the duty becomes 100 % and the high-side output transis tor becomes on state if input voltage becomes less than setting output voltage. ? oscillation frequency for dc / dc convertor (osc_dcdc) oscillation frequency is decided by the current which is cau sed by resistance connected to rt pin. the range of oscillation frequency can be set 200 khz to 600 khz . short circuit protection starts operating and oscillator stops when rt pin is short-circuited to ground. ? short circuit protection (scp) dc / dc convertor stores with short circuit protection. the short ci rcuit protection starts operation after the short circuit protection circuit considers that the output is in short state when th e over current protection starts operation in a state with fb pin voltage less than 0.45 v (typ) (except during soft start). dc / dc convertor output is off when the short circuit protection starts o peration. in addition, soft start is initialized and comp pin is discharged. afterwards , i t reboots after 1,024 cycles of the oscillation frequency. ? reference voltage of 2 systems dc / dc convertor and ldo have a reference voltage which is made from an independent block in both output voltage part and abnormal detection part. in this way , e ven if there was an abnormality in reference voltage of whichever it is suitable for a safe design because ab normality can be informed from pg pin each reference voltage is used as follows. vref1a: reference of dc / dc convertor output voltage and vreg voltage. vref1b: reference of dc / dc convertor ovd , lvd , scp , vsovp and ocp. vref2a: reference of ldo output voltage. vref2b: reference of ldo ovd and lvd. ? over voltage detecti on (ovd) pg1 pin becomes l when reference voltage of dc / dc convertor exceeds 0.9 5 v (typ). pg2 pin becomes l when output voltage of ldo exceeds 5.38 v (typ). ? low voltage detection (l vd) pg1 pin becomes l when reference voltage of dc / dc convertor is less than 0. 65 v (typ). pg2 pin becomes l when output voltage of ldo is less than 4.62 v (t yp). ? over current protection circuit (ocp , scp) dc / dc convertor and ldo store with over current protection. current limit is taken in the over current detection of the dc / dc converter, and on duty cycle is limited, and output voltage dec reases. in addition, w hen it becomes overloaded and fb pin voltage decreases and is less than 0.45 v (typ), scp is detected. afterwards, it reboots after 1,024 cycles of th e oscillation frequency . current limit is taken in the over current detection of the ldo, and output voltag e decreases (foldback current limiting characteristic). when it load-short-circuited, it prevents the destruction of the ic, but thi s protection circuit is effective for prevention of destruction by the sudden accident. it is not supported use at the continuous protection circuit operation and a transitional period. downloaded from: http:///
6/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C ? drv logic this is the driver block of fet. it drives sw pin . ? over voltage protection circuit (vsovp_latch) vs pin possesses over voltage protection . if the voltage of the vs pin becomes more than over voltage detecti on level 13.5 v (typ), it starts operation. ss and comp is discharged after dc / dc output is off when the over voltage protection circuit starts operation. afterwards, it reboots after 1,024 cycles of the oscillat ion frequency from release when vs returned to 13.0 v (typ). vsovp is effective for prevention of destruction b y the sudden accident . vsovp is effective for prevention of the destruction by the sudden accident . please avoid using it at continuous protection circuit operatio n. ? under voltage malfunction prevention circuit (uvlo_vcc) dc / dc convertor circuit shuts down after uvlo starts operating when vcc vol tage is less than 3.5 v (typ). it starts normal operating after uvlo is released when vcc voltage is mo re than 4.0 v (typ). please apply more than 4.45 v to the vcc voltage in initial startup. ? thermal shut down (tsd1 , tsd2) dc / dc convertor (tsd1) and ldo (tsd2) of bd39012efv- c, each has thermal shutdown and operates individually. the protection is taken when chip temperature tj exceeds 175 c (typ) . dc / dc convertor lets the switching off. the output is off in ldo. in addition, it returns if it becomes less th an 150 c (typ). ? slope , current sence this block is a block to give slope compensation of the curren t mode of dc / dc convertor and current return. ? ldo block ldo operates by full independence. even if it is the state th at does not contain the voltage in pvcc pin and vcc pin , po wer on reset (por), watch dog timer (wdt), pg2 pin, rst pin, rstwd pin and enwd pi n become effective when a power supply is spent to vs pin. but osc_wdt err detect informing abnormality does not function. (timing chart 6 (*4)) ? power on reset (por) por starts charge to the outside capacitor of ct pin (= cct) when vo2 of ldo o utput releases under voltage detect. rst2 pin outputs `h` when ct pin voltage becomes more than 1.18 v (typ). cct is discharged and rst2 pin outputs `l` when vo2 detects low voltage. please set the setting range of cct in the range of 0.001 f from 10 f ? oscillator for watch dog timer (osc_vout) this block creates a reference frequency of the watch dog timer. th e oscillation frequency is determined by the rtw resistance. the oscillation frequency can be set in the range of 50 khz to 250 khz. short circuit protection starts operating and oscillator stops when rtw pin is short-circuited to ground. ? watch do g timer (wdt) microcontroller ( c) operation is monitored with clk pin. window watch dog timer i s included to enhance the assurance of the system. wdt starts operating when por and enwd becomes h igh. it watches both edges (rising edge, falling edge) of the clk pin. when the width of both edges is lower than the watch dog lower limit (fast ng) or more than the watch dog upper limit (slow ng), rstwd is made low during wdt reset time (twres) ( c err detect). fast ng and slow ng are decided by the number of the counts of osc_wdt . therefore a time change of fast ng and slow ng is possible by changing frequency of osc_wdt. in addition, i t lets rstwd low and informs abnormality w hen abnormality occurs in osc_wdt (including the rtw pin ground) (osc_ wdt err detect). figure 1. witch dog timer state change diagram (wdt fsm) standby mode rstwd=high osc_wdt err detect rstwd=low c err detect rstwd=low nomal mode rstwd=high wdt_clk error detection release osc_wdt error detection por=low or enwd= low por=high and enwd=high fast ng or slow ng detection rstwd low range > twres por=low or enwd= low rstwd low range < twres osc_wdt error detection c error not detect (fast ng , slow ng not detect) downloaded from: http:///
7/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C absolute maximum ratings parameter symbol rating unit supply voltage vcc -0.3 to 45 (note 1) v output switch pin voltage vsw -0.3 to vcc v en1 pin voltage ven1 -0.3 to 45 v vreg pin voltage vreg -0.3 to 7 v rt , fb , comp pin voltage vrt , vfb , vcomp -0.3 to 7 v vs pin voltage vs -0.3 to 45 *1 v en2 pin voltage ven2 -0.3 to 45 v vo2 pin voltage vo2 -0.3 to 7 v pg1 , pg2 pin voltage vpg1 , vpg2 -0.3 to vo2 v rst2 , rstwd pin voltage vrst2 , vrstwd -0.3 to vo2 v ct pin voltage vct -0.3 to 7 (note 2) v rtw pin voltage vrtw -0.3 to 7 v enwd pin voltage venwd -0.3 to vo2 v clk pin voltage vclk -0.3 to 7 v power dissipation (note 3) pd 4.0 w storage temperature range tstg - 55 to +150 c junction temperature tjmax 150 c (note 1) pd, should not be exceeded (note 2) vs+0.3 v, should not be exceeded. (note 3) derating in done 32.0 mw / c for operating above ta 25 c (mount on 4-layer 70.0mm x 70.0mm x 1.6mm board) caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important t o consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. recommended operating conditions (ta = - 40 c to +125 c ) parameter symbol m in typ m ax u nit operating power supply voltage vcc 4 (note 4) - 36 (note 5) v vs operating voltage vs 6.0 - 10 v switch current isw 0 - 1 a o sci llation frequency fosc 200 - 600 khz wdt os cillation frequency foscw 50 - 250 khz ldo output current ivo2 0 - 0. 4 (note 5) a operating temperature range topr - 40 - 125 c (note 4) initial startup is over 4.45 v (note 5) pd, should not be exceeded downloaded from: http:///
8/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C electrical characteristics (unless otherwise specified ta = - 40 to 125 c , vcc = 4 to 36 v) parameter symbol m in t yp m ax u nit function < the whole > standby circuit current 1 istb1 - 0 10 a ven1 = 0 v , ta = 25 c standby circuit current 2 istb2 - - 50 a ven1 = 0 v vcc circuit current iqvcc - 2 4 ma fb = 0 v vs circuit current iqvs - 505 1100 a vs = 6 v , ven2 = 5 v , enwd = 0 v , rtw = 24 k , clk = 0 v , pg1 , pg2 , rst2 , rstwd = h uv lo detection voltage vuvlo 3.3 3.5 3.7 v vcc detection uvlo hysteresis voltage vuvlohys 0.25 0.5 0.75 v vcc detection vreg output voltage vvreg 3. 6 4.0 4. 4 v en1l threshold voltage ven1l - - 0.8 v en1h threshold voltage ven1h 3.5 - - v en1 inflow current ien1 - 13 26 a ven1 = 5 v < dcdc > pch mosfet on resistance ronswp - 0.4 1 isw = 300 ma nch mosfet on resistance ronswn - 0.4 1 isw = -300 ma over current protection iolim 1 - - a output leak current 1 iswlk1 - 0 10 a ven1 = 0 v , ta = 25 c output leak current 2 iswlk2 - - 50 a ven1 = 0 v reference voltage vref 0.784 0.800 0.816 v vcomp = vfb fb input bias current ifbb -1 - 1 a fb = 0.8 v soft start time tss 2.70 3.28 4.00 ms rt = 24 k os cillation frequency fosc 450 500 550 khz rt = 24 k vs over voltage detection vvsovp 11 13.5 16 v pg1 pull- up resistance rpupg1 30 50 75 k internal resistance (vo2 pull- up ) pg1 output l voltage vpg1l - - 0.3 v pg1 , pg2 , rst2 , rstwd pin short (note 1) pg1 low voltage detection voltage vlvd1 0.60 0.65 0.70 v vfb monitor , pg1 output pg1 over voltage detection voltage vovd1 0.90 0.95 1.00 v vfb monitor , pg1 output (note 1) pg1 , pg2 , rst2 , rstwd pin is shorted. in the case of on, it is met only tr of pg1. downloaded from: http:///
9/ 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C electrical characteristics C continued (unless otherwise specified ta = - 40 to 125 c , vcc = 4 to 36 v) parameter symbol m in t yp m ax u nit condition < ldo / reset > output voltage vo2 4.90 5.00 5.10 v 5 ma to 400 ma , vs = 6.0 v to 10 v drop voltage 1 vdd1 - 0.17 0.33 v vs = 4.75 v , io = 200 ma drop voltage 2 vdd2 - 0.33 0.67 v vs = 4.75 v , io = 400 ma en2l threshold voltage ven2l - - 0.8 v en2h threshold voltage ven2h 2.8 - - v en2 inflow current ien2 - 25 50 a ven2 = 5 v under voltage detection detection voltage vrst2det 4.50 4.62 4.75 v under voltage detection hysteresis vrst2deth 20 60 100 mv power on reset time tpor0 10 14 18 ms cct = 0.1 f (note 2) rst2 pull- up resistance rpurst2 30 50 75 k internal resistance (vo2 pull- up ) rst2 output l voltage vrst2l - 0.15 0.30 v vo2 1 v , pg1 , pg2 , rst2 , rstwd pin short (note 3) pg2 pull- up resistance rpupg2 30 50 75 k internal resistance (vo2 pull- up ) pg2 output l voltage vpg2l - - 0.3 v pg1 , pg2 , rst2 , rstwd pin short (note 4) pg2 low voltage detection voltage vlvd2 4.50 4.62 4.75 v vo2 monitor , pg2 output pg2 over voltage detection voltage vovd2 5.25 5.38 5.50 v vo2 monitor , pg2 output (note 2 ) power on reset time tpor can be changed by capacity of the capacitor to connect to ct. (available range 0.001 to 10 f) tpor (ms) P tpor0 (reset delay time at the time of the 0.1 f connection ) cct (f) / 0.1 ct capacity: 0.1 cct 10 f tpor (ms) P tpor0 (reset delay time at the time of the 0.1 f connection ) cct (f) / 0.1 (0.1) ct capacity: 0.001 cct 0.1 f (note 3 ) pg1, pg2, rst2, rstwd pin is shorted. in the case of on, it is met only tr of rst2. (note 4 ) pg1, pg2, rst2, rstwd pin is shorted. in the case of on, it is met only tr of pg2. downloaded from: http:///
10 / 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C electrical characteristics C continued (unless otherwise specified ta = - 40 to 1 25 c , vcc = 4 to 36 v) parameter symbol m in t yp m ax u nit conditions < wdt > wdt os cillation frequency foscw 75 100 125 khz rtw = 24 k , vo2 = 4.9 v to 5.1 v clk fast ng threshold twf 123 / foscw 128 / foscw 133 / foscw s clk edge time clk slow ng threshold tws 865 / foscw 870 / foscw 875 / foscw s wdt reset time twres 123 / foscw 128 / foscw 133 / foscw s clk detection minimum pulse width wclk 1 - - s clk l threshold voltage vclkl - - 0.8 v clk h threshold voltage vclkh 2.6 - - v clk inflow current iclk - 25 50 a vclk = 5 v enwd l threshold voltage venwdl - - 0.2 vo2 v vo2 = 4.9 v to 5.1 v enwd h threshold voltage ven wdh 0.8 vo2 - - v vo2 = 4.9 v to 5.1 v enwd pull- up resistance rpurenwd 100 200 300 k rstwd pull- up resistance rpurstwd 30 50 75 k internal resistance (vo2 pull- up ) rstwd output l voltage vrstwdl - - 0.3 v pg1 , pg2 , rst2 , rstwd pin short (note 5) (note 5) pg1, pg2, rst2, rstwd pin is shorted. in the case of on, it is met only tr of rstwd. downloaded from: http:///
11 / 39 tsz02201-0t2t0am00180-1-2 ? 2014 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C typical performance curves figure 2 . standby current vs supply voltage (standby circuit current) figure 3 . vcc circuit current vs supply voltage (vcc circuit current) figure 4 . vs circuit current vs vs supply voltage ( vs circuit current) figure 5 . uvlo detect voltage vs ambient temperature (uvlo detection voltage) 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 -40 -10 20 50 80 110 uvlo detect voltage: vuvlo [v] ambient temperature: ta [ c] uvlo detect uvlo undetect 0 1 2 3 4 0 6 12 18 24 30 36 vcc circuit current: iqvcc [ma] supply voltage: vcc [v] - 40 25 125 -1 0 1 2 3 4 5 0 6 12 18 24 30 36 standby current: i [a] supply voltage: vcc [v] - 40 25 125 0.0 0.5 1.0 1.5 2.0 0 2 4 6 8 10 vs circuit current: iqvs [ma] supply voltage: vs [v] - 40 25 125 downloaded from: http:///
12 / 39 tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C typical performance curves - continued figure 6 . uvlo hysteresis voltage vs ambient temperature (uvlo hysteresis voltage) figure 7 . vreg output voltage vs supply voltage (vreg output voltage) figure 8 . vreg output voltage vs en1 supply voltage ( en threshold voltage) figure 9 . en1 input current vs en1 supply voltage ( en inflow current) 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 -40 -10 20 50 80 110 uvlo hysteresis voltage: vuvlohys [v] ambient temperature: ta [ c] 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5 0 6 12 18 24 30 36 vreg output voltage: vvreg [v] supply voltage: vcc [v] - 40 25 125 0 5 10 15 20 25 30 0 1 2 3 4 5 en1 input current: ien [a] en1 supply voltage: en1 [v] - 40 25 125 0 1 2 3 4 5 0 1 2 3 4 5 vreg output voltage: vvreg [v] en1 supply voltage: en1 [v] - 40 25 125 downloaded from: http:///
13 / 39 tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 BD39012EFV-C typical performance curves - continued figure 10 . reference voltage vs ambient temperature (reference voltage) figure 11 . soft start time vs ambient temperature (soft start time) figure 12 . osc frequency vs ambient temperature ( os cillation frequency) figure 13 . vso vp detect voltage vs ambient temperature ( vs over voltage detection) 2.50 2.75 3.00 3.25 3.50 3.75 4.00 -40 -10 20 50 80 110 soft start time: tss [ms] ambient temperature: ta [ c] 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 -40 -10 20 50 80 110 vsovp detevt voltage: vvsovp [v] ambient temperature: ta [ c] 450 460 470 480 490 500 510 520 530 540 550 -40 -10 20 50 80 110 osc frequency: fosc [ hz] ambient temperature: ta [ c] 0.780 0.785 0.790 0.795 0.800 0.805 0.810 0.815 0.820 -40 -10 20 50 80 110 reference voltage: vref [v] ambient temperature: ta [ c] downloaded from: http:///
14 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 14 . pg1 pull- up resistance vs supply voltage (pg1 pull- up resistance) figure 15 . pg1 under voltage detect voltage vs ambient temperature (pg1 low voltage detection voltage) figure 16 . pg1 over voltage detect voltage vs ambient temperature (pg1 over voltage detection voltage) figure 17 . output voltage vs vs supply voltage (output voltage) 0.60 0.62 0.64 0.66 0.68 0.70 -40 -10 20 50 80 110 pg1 under voltage detect voltage: vlvd1 [v] ambient temperature: ta [ c] uvd detect uvd undetect 0 15 30 45 60 75 -40 -10 20 50 80 110 pg1 pull- up resistance: rpupg1 [k] ambient temperature: ta [ ] 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 -40 -10 20 50 80 110 pg1 over voltage detect voltage: vovd1 [v] ambient temperature: ta [ c] ovd undetect ovd detect 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 2 4 6 8 10 output voltage: vo2 [v] vs supply voltage: vs [v] - 40 25 125 downloaded from: http:///
15 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 18 . vo2 drop voltage vs vo2 load current (drop voltage) figure 19 . vo2 output voltage vs vo2 load current (ldo ocp) figure 20 . vo2 output voltage vs en2 supply voltage (en2 threshold voltage) figure 21 . en2 input current vs en2 supply voltage (en2 inflow current) 0 100 200 300 400 500 600 0 100 200 300 400 vo2 drop voltage: vdd [v] vo2 load current : i o [ma] - 40 25 125 0 1 2 3 4 5 6 7 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 vo2 output voltage: vo2 [v] vo2 load current: i o [a] 0 5 10 15 20 25 30 0 1 2 3 4 5 en2 input current: ien [a] en2 supply voltage: en2 [v] - 40 25 125 0 1 2 3 4 5 6 0 1 2 3 4 5 vo2 output voltage: vo2 [v] en2 supply voltage: en2 [v] - 40 25 125 downloaded from: http:///
16 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 22 . pg2 lvd detect voltage vs ambient temperature (pg2 low voltage detection voltage) figure 23 . pg2 ovd detect voltage vs ambient temperature (pg2 over voltage detection voltage) figure 24 . lvd hysteresis vs ambient temperature (under voltage detection hysteresis) figure 25 . power on reset time vs ambient temperature (power on reset time) 4.50 4.52 4.54 4.56 4.58 4.60 4.62 4.64 4.66 4.68 4.70 4.72 4.74 -40 -10 20 50 80 110 pg2 lvd detect voltage: vlvd2 [v] ambient temperature: ta [ c] lvd2 undetect lvd2 detect 5.25 5.27 5.29 5.31 5.33 5.35 5.37 5.39 5.41 5.43 5.45 5.47 5.49 -40 -10 20 50 80 110 pg2 ovd detect voltage: vovd2 [v] ambient temperature: ta [ c] ovd2 detect ovd2 undetect 0 20 40 60 80 100 120 -40 -10 20 50 80 110 lvd hysteresis: vrst2deth [mv] ambient temperature: ta [ c] 10 11 12 13 14 15 16 17 18 -40 -10 20 50 80 110 power on reset time: tpor0 [ms] ambient temperature: ta [ c] downloaded from: http:///
17 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 26 . rst2 pull-up resistance vs ambient temperature (rst2 pull- up resistance) figure 27 . pg2 pull-up resistance vs ambient temperature (pg2pull- up resistance) figure 28 . wdt osc frequency vs ambient temperature (wdt os cillation frequency) figure 29 . clk fast ng threshold vs ambient temperature (clk fast ng threshold) 0 15 30 45 60 75 -40 -10 20 50 80 110 rst2 pull- up resistance: rpurst2 [k] ambient temperature: ta [ ] 0 15 30 45 60 75 -40 -10 20 50 80 110 pg2 pull- up resistance: rpupg2 [k] ambient temperature: ta [ ] 123 126 128 131 133 -40 -10 20 50 80 110 clk fast ng threshold: wf [s] ambient temperature: ta [ c] 75 80 85 90 95 100 105 110 115 120 125 -40 -10 20 50 80 110 wdt osc frequency: foscw [khz] ambient temperature: ta [ c] downloaded from: http:///
18 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 rohm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 30 . clk slow ng threshold vs ambient temperature (clk slow ng threshold) figure 31 . wdt reset time vs ambient temperature (wdt reset time) figure 32 . clk threshold voltage vs ambient temperature (clk threshold voltage) figure 33 . clk input current vs clk supply voltage (clk inflow current) 865 868 870 873 875 -40 -10 20 50 80 110 clk slow ng threshold: tws [s] ambient temperature: ta [ c] 123 126 128 131 133 -40 -10 20 50 80 110 wdt reset time: twres [s] ambient temperature: ta [ c] 0 10 20 30 40 50 0 1 2 3 4 5 clk input current: iclk [a] clk supply voltage: clk [v] - 40 25 125 0.5 1.0 1.5 2.0 2.5 -40 -10 20 50 80 110 clk threshold voltage: vclk [v] ambient temperature: ta [ ] downloaded from: http:///
19 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 typical performance curves - continued figure 34 . enwd threshold voltage vs ambient temperature (enwd threshold voltage) figure 35 . enwd pull-up resistance vs ambient temperature (enwd pull- up resistance) figure 36 . rstwd pull- up resistance vs ambient temperature (rstwd pull- up resistance 100 150 200 250 300 -40 -10 20 50 80 110 enwd pullup resistance: rpurenwd [k] ambient temperature: ta [ ] 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -40 -10 20 50 80 110 enwd threshold voltage: venwd [v] ambient temperature: ta [ ] enwd undetect enwd detect vo2 = 5 v 0 15 30 45 60 75 -40 -10 20 50 80 110 rstwd pullup resistance: rpurstwd [k] ambient temperature: ta [ ] downloaded from: http:///
20 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 timing chart 1. start up ? stop en1 short to vcc , en2 short to vs , vout = 6 v , load from vo2 is 4 00 ma . vcc pvcc en 1 vo 1 vs en 2 pg 1 vo 2 pg 2 ct rst2 power on reset time 14 ms (typ ) cct=0.1 f lvd off 4.68 v (typ) lvd on 4.62 v (typ) lvd on 0.65 v (typ) uvlo_vcc on 3. 5 v (typ) uvlo_vcc off 4 v (typ) en 2 off soft start time 3.28 ms (typ) rt = 24 k 1.18 v (typ) 0.25 v (typ) internal ss fb lvd off 0.68 v (typ) scp on 0.45 v (typ) vo 2 level vo 2 level vo 2 level en 2 on en 2 on downloaded from: http:///
21 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 2 . start up ? stop en1 is controlled, en2 short to vs, vout = 6 v, load from vo2 is 400 ma after vcc starts up. vcc pvcc vo 1 vs en 2 pg 1 vo 2 pg 2 ct rst2 power on reset time 14 ms (typ ) cct=0.1 f lvd off 4.68 v (typ) lvd on 4.62 v (typ) lvd on 0.65 v (typ) soft start time 3.28 ms (typ) rt = 24 k 1.18 v (typ) 0.25 v (typ) internal ss fb lvd off 0.68 v (typ) vo 2 level vo 2 level vo 2 level en 1 vreg vreg uvlo off 3.4 v (typ) en 2 off en 2 on downloaded from: http:///
22 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 3. dcdc converter protection operations 4. ldo protection operations (the whole) sw pulse width is limited by ocp switching operate until isw becomes over voltage protection level vcc , pvcc vout ( vs ) isw pg 1 internal soft start ovd lvd tsd tsd1 on tsd1 off ocp 1024clk ocp + scp 1024clk short to gnd ovpvs 150 c (typ) 175 c (typ) 13 v (typ) 13 . 5 v (typ) ovd lvd 1024clk 0.65 v (typ) 0.95 v (typ) 0.68 v (typ) 0.90 v (typ) 0.45 v (typ) fb ocp + scp sw 0.45 v (typ) vs vo 2 io 2 pg 2 rst2 ovd lvd tsd tsd2 on tsd2 off ct tpor tpor tpor lvd lvd ocp 0.24 v (typ) 1.18 v (typ) 0.24 v (typ) 1.18 v (typ) 4.62 v (typ) 5.32 v (typ) 5.38 v (typ) 4.68 v (typ) 1.18 v (typ) downloaded from: http:///
23 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 5. ldo protection operations (reset timing) 6. wdt *1 standby mode , *2 normal mode , *3 c err detect , *4 osc_wdt err detect (see figure 1. wdt fsm) (note 1) please rel ease power on reset in a state of clk = low by all means. vo 2 returns before reset is detected after lvd is detected vo 2 ct rst2 pg 2 5v 5v 4. 62 v (typ) 4. 68 v (typ) 0. 25 v (typ) 1. 18 v (typ) vo 2 ct rst2 pg 2 5v 5v 0. 25 v (typ) 1. 18 v (typ) 3.0 v (typ) 4. 62 v (typ) 4. 68 v (typ) vo 2 returns after taking a pause enough after lvd is detected when vo 2 output decreases earlier than discharge time of ct vo 2 ct rst2 pg 2 4. 62 v (typ) 4. 68 v (typ) vo 2 por enwd rstwd clk wres slow ng standby (* 1) fast ng normal (* 2) wdt_fsm (* 2) (* 2) (* 1) (* 2) (* 1) (* 3) (* 2) (* 2) (* 4) (* 3) fast ng wres wres wdt_clk tpor (* 3) lvd clk have to be on low start (note 1) downloaded from: http:///
24 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 application example *there are many factors (board layout , variation of the part, etc.) that can affect the characteristics. please verify and confirm using practical applications. *be sure to connect the t1, t2 and t3 pin to ground. *in the case of high current application (about more than 500 ma fro m dc / dc convertor), please insert the schottky barrier diode between sw and pgnd example of constant setting vcc = 13.5 v , vo1 = 6.5 v , fsw = 500 khz , iload (vo2) = 400 ma , fwdt = 100 khz name value unit parts no size manufacture ic - - BD39012EFV-C 7.8mm 7.6mm rohm l1 4.7 uh 3n1cdh74np470kc 7.0mm 7.0mm sumida cvcc1 4.7 uf gcm32er71h475ka40l 3225 murata cvcc2 47 uf - - - cpvcc 4.7 uf gc m32er71h475ka40l 3225 murata cvo1 10 // 2 uf gcm31cr71c106k 3216 murata cvs 1 uf gcm188r71c105k 1608 murata cct 0.1 uf gcm188r11h104k 1608 murata cvreg 1 uf gcm188r71c105k 1608 murata cfb1 100 pf gcm1882c1h101ja01 1608 murata cco1 4700 pf gcm2162c1h472ja01 1608 murata cvo2 10 uf gcm31cr71c106k 3216 murata rfb1b 22 k mcr03 1608 rohm rfb1a 6.2 // 6.2 k mcr03 1608 rohm rrt 24 k mcr03 1608 rohm rrtw 24 k mcr03 1608 rohm rco1 12 k mcr03 1608 rohm notes for pattern layout of pcb 1. design the wirings shown in bold line as short as possible. 2. place the input ceramic capacitor cvcc1 , cvcc2 , cpvcc , cvo1 , cvs and cvo2 as close to ic as possible. 3. place rrt and rrtw in gnd pin nearest ic not to receive a noise. 4. place the rfb1a and rfb1b as close to fb pin as possible and provide th e shortest wiring from fb pin. in addition, be careful not to arrange it in parallel with sw pin and high curre nt line of l1 because it is the high impedance line. 5. the loop of the red arrow is the line which high current li ne. please layout with the shortest loop as much as possibl e, and wire with the 1-layer without pass the through hall. 6. please connect to gnd thermal plate of ic back. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 pvcc vcc en 1 en 2 t1 rt rtw pg 1 pg 2 rst2 rstwd gnd sw pgnd t3 vreg fb comp clk enwd ct vo 2 t2 vs cco1 rco1 rfb1a rfb1b cfb1 cvo1 l1 rrt rrtw cvreg cvs cpvcc cvcc1 cct cvo2 cvcc2 vo 1 micro controller open downloaded from: http:///
25 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 selection of components externally connected 1) setting the output voltage (rfb1a , rfb1b , cfb1b) in BD39012EFV-C , vo1 voltage can be set from reference voltage 0.8 v (typ) and the re sistance division ratio of feed buck resistance rfb1a and rfb1b . output voltage can be calculated as follow. vo = .8 ( + ) [ ? ] [output voltage setting resistance] use of highly precise resistance less than 1 % is recomme nded for output voltage setting. it is recommended that it is set around 1 k to 100 k for resistor value. the fb pin is very high impedance and easy to be affected by the noise . by all means connect resistance to nearest an ic . in addition, please layout it not to be affected by the no ise of the sw pin without layout nearness. as needed , 0 point is made by assembling cfb1 beside rfb1b, and the stable ratio of the control system can be planned. the equation of 0 points is as follows. ?? = ? [ ] 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 pvcc vcc en 1 en 2 t1 rt rtw pg 1 pg 2 rst2 rstwd gnd sw pgnd t3 vreg fb comp clk enwd ct vo 2 t2 vs vcc or outside control outside flag flag flag flag vcc or outside control or vo1 cco 1 rco 1 rfb1a rfb1b cfb1 cvo1 l1 rrt rrtw cvreg cvs cpvcc cvcc1 cct cvo2 cvcc2 d1 outside vo1 cfb1 fb rfb1brfb1a vref downloaded from: http:///
26 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 2) setting frequency of dc / dc convertor (rrt) internal oscillation frequency can be set by resistor value connec ting with rt . (see figure 37) settable range is 200 khz to 600 khz . the relations of resistor value and the oscillation frequency i s decided as follow. because in the setting that deviated from this range, the operation is not guaranteed, please be careful. when it is affected by the parasitism capacity of a board, it can not be set to desired frequency. therefore please connect it to nearest ic and drop it to ground. figure 37. dc / dc oscillation frequency characteristics 3) duty cy cle duty cycle of dc / dc convertor is similar to the following equation. (vout = output voltage, vin = input voltage, = efficiency) d = ? ? ? [ % ] 4) selecting the inductance (l1) the inductor value is chos en based on a duty cycle of operation frequency (fsw), load cu rrent (iout), ripple current ( il), input voltage (vin) and output voltage (vout). the loss of the coi l becomes the total of wired resistance of a coil ldcr and loss to occur in ferrite core. it is thought that the most of the lo ss of coil depend on ldcr when oscillat ion frequency is to around 2 mhz. please choose a small thing of ldcr because the range of set frequency of BD39012EFV-C is f = 200 khz to 600 khz. when ldcr is made too much small, inductance value becomes sm all, and peak current value flowing at on time grows too much big, and internal loss and po wer dissipation of coil grow big and efficiency turns worse. wh en a big inductance value is greatly set too much, ldcr grows big and e fficiency in the high load turns worse. moreover a ferrite core causes magnetic saturation and an inductance val ue suddenly decreases. then there is the risk that excessive current flows in. generally, if it is set to become the ripple current of less than 30 % of outpu t peak loads, in most cases, stable characteristics can be got . the aim of the smallest inductance level can be calculated by next equation. ? = . [ ] ? ? = ? ? ? ? ? ? [ ] the inductance value chosen here is one of the indexes insi stently. please confirm whether peak current can meet the direct current wei ght characteristics of the inductor enough. the equation of peak current (ipeak) is as follows. ? = + ? [ ] inductor current waveform y = 9115.6x -0.913 200 250 300 350 400 450 500 550 600 650 20 25 30 35 40 45 50 55 60 65 70 fosc [khz] rrt [k ] fosc vs rrt i l i out downloaded from: http:///
27 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 5) selecting the input capacitor (cvcc1 , cpvcc) input capacitors reduce the power output impedance that is conn ected to vcc and pvcc. it is recommended that electrolytic capacitor such as cvcc2 is inserted in the case of the pcb layout which power supply impedance grows big . please use the capacitor that impedance is low and an impleme ntation area is sma ll (m ore than at least 2 f) for the bypass capacitor connected to nearest ic. the ripple current limit of input capacitor is approached by the f ollowing equation. it is recommended that ceramic capacitor with enough limit current is used. ?,? ? ? [ ] minimum input capacity is approached by the following equat ion based on the input ripple voltage of the aim. input capacitor esr (cesr) ?,? ? ?? ? ? + ? c ? [ ] 6) setting of the internal reg input capacitor (cvreg) please insert ceramic capacitor of 1 f in nearest vreg pin of internal reference power supply. 7) setting of the output capacitor (cvo1) the output capacitor cvo1 has an important role in output ripple v oltage, load-responsive and stability of the loop. the output voltage ripple is generally set in less than 1 % of the output voltage and approached by the following equation. (e sr of cvo1 = r cvo1 ) ?? = ? ( ? + 8 ? ? ) ? an output capacitor significantly influences the output voltage ch ange in the load fluctuation. the quantity of change depends on many factors including capacity, parasitism esr, pa rasitism inductor phase characteristics and through rate of load. please use it after confirmation with an actual prod uct enough. when phase characteristics are enough, the quantity of drop vdro p of the output voltage by the load fluctuation can be approached by following equation. a figure of image is sho wn as follows. ? = ? + ? ? ? ? ? ? [ ? ] please use an input capacitor and the output capacitor after consi dering dc voltage characteristics and temperature characteristics enough. when a ceramic capacitor is used, the capacity comes under a big influence of an applied voltage and temperature, and capacity suddenly decreases. pl ease consider characteristics enough, and it is necessary to choose the product superior in temperature charact eristics such as b characteristics or x7r characteristics. when aluminum electrolytic capacitor is used , large-capacity is got in small size. but it is necessary to inspect temperature characteristics of esr and the capacity enou gh because capacity and esr suddenly change by a temperature change. the capacitor 1.5 times to 2 times larger tha n a limit is recommended about the pressure-resistant. 8) setting of the schottky barrier diode of sw pin (d1) when big load current is pulled, sw pin waggles lower th an ground while sw pin is l because BD39012EFV-C is dc / dc convertor of the synchronous rectification system. please insert schottky barrier diode between sw and pgnd to prevent the ic from malfunctioning by this. in the case of the setting that load current of dc / dc convertor (iout) exceeds 500 ma, it is recommended that it is inserted. ripple voltage vdrop v pp load downloaded from: http:///
28 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 9) setting the soft start time soft start is a function to reduce rush current and over shoot. soft start time of BD39012EFV-C is dec ided by the oscillation frequency of dc / dc convertor. when en1 is released, vreg start up after internal circuit delay opera tion. ss pin is counted up when vreg arrives at 3.4 v (typ). output volta ge vo1 starts up to approximately 90 % when ss pin starts up to 0.8 v. the time from internal ss pin begins to start up to arrive at 0.8 v ca n be calculated by the equation as below. = 68 . ? [ ] 10) setting ct pin (cct) power on reset time is decided freely by adding capacitor between ct pin and ground. as the value of cct becomes big, power on reset time becomes long. standard powe r on reset time corresponded to the list of cct capacitors is shown below. please connect to ground nearest the ic not to do wrong operation by noise. cct (f) power on reset time [ms] 10 1400 4.7 658 1 140 0.47 65.8 0.1 14 0.047 (note1) 6.58 0.01 (note1) 1.4 0.0047 (note1) 0.658 0.001 (note1) 0.14 (note1) setting time 100 s 11) setting the pg1 , pg2 , rst2 and rstwd pin pg1 , pg2 , rst2 and rstwd are the open drain pin that is pulled up inside b y vo2 output. when each abnormality is detected each becomes l output. when it come back normally, eac h becomes h (vo2 output) output. all these 4 pins can be connected and used to or output. logic image by each protection is shown below. vo2 pg1 vo1 ovd vo1 lvd vo1 vsovp en1 uvlo tsd1 pg2 vo2 ovd vo2 lvd tsd2 rst2 wdt fast n.g. wdt slow n.g. wdt clk n.g. rstwd vcc en 1 ss (internal pin) soft start time vo 1 vreg vreg uvlo 3.4v(typ) ss =0.8v(typ) vo 90 % downloaded from: http:///
29 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 12) setting the phase compensation circuit (dc / dc converter) dc / dc is current mode control and is 2-pole and 1-zero syste m. it has two poles formed by error amp and output load and one zero added by phase compensation. the appropriate po le point and zero point placement results in good transient response and stability. generic bode plot of dc / dc con verters is shown below. at point (a), gain starts falling due to the pole formed by output impedance of erro r amp and c co 1 capacitance. after that, in order to cancel out the pole formed by output load, insert zero formed by r co 1 and c co 1 and offset the fluctuation of gain and phase before reaching out to point (b). phase margin level external component values are determined in this way. the r co 1 determines the cross over frequency f crs , i.e., the frequency at which dc / dc total gain falls down to 0 db. when f crs is set high, good transient response is expected but stability is sacrificed on the other hand. when f crs is set low, good stability is expected but transient response is sacrificed on the other hand. in this example, component value is set in a way f crs is 1 / 5 to 1 / 10 of the switching frequency. (i) r co 1 for phase compensation phase compensation resistor r c o1 can be obtained by the following equation. = ? ? ? .8 ? [ ? ] where ? : : : , .8? : . / ? ? : / ? (ii) c co1 for phase compensation phase compensation capacitor c co1 can be obtained by the following equation. = ? ? [ ] where : however these are simple equation and thus adjustment of the value using the actual product may be necessary for optimization. also compensation characteristics are influenced b y pcb layout and load conditions and thus thorough evaluation using the production intent unit is recommended. a 00 -90 -180 -90 (a) gbw (b) f crs gain [db] phase[deg] -180 f[khz] phase margin f[khz] downloaded from: http:///
30 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 13) setting the phase compensation circuit it is suitable that the starting point of the phase compen sation is set by the following condition equation. pleas e make a board wire diagram, and confirm whether frequency characteristic to a im for is satisfied. actually, the characteristics greatly change by layout of pcb, taking wiring around, kind of used p arts or terms of use (temperature etc.). for example , it might resonate after lc resonance point moves by capacity dec rease at the low temperature and increase of the esr when electrolytic capacitor is used for an output c apacitor. to a capacitor for the phase compensation, using such as tempera ture compensation types is recommended. please confirm stability and responsiveness with practical ap plication by all means. the frequency characteristic with the practical application is confirmed using gain phase analyzer and fra. please refer to each measuring instrument manufacturer for the method s of the measurement. in addition, when there are not these measuring instruments, there is a method to gue ss margin degree by load reply. it is said that responsiveness is low when there is much quan tity of change, and there are few phase margin w hen there is much number of ringing times after the change in the c ase of monitoring change of the output when it was made to fluctuate from a no load state to a peak load. the aim is ringing more than twice. but the quantitative phase margin level cannot be confirmed. 14) setting the ldo output capacitor (cvo2) the capacitor must be added between output pin and gnd in order to stop from having it oscillated. please ensure to select the capacitor higher than 6 f in the range of voltage and t emperature. please confirm in the last state to use because it changes by wiring impedance of the board, input p ower supply and load actually. when selecting a ceramic capacitor, b characteristics or x7r h igher is recommended which is good in temperature characteristic and has excellent dc bias characteristic. please do final decision of the capacitance after confirming it b y practical application enough. 15) setting the ldo input capacitor (cvs) please add the capacitor more than 0.1 f between vs and gnd. because the capacitance setting varies according to application, confirm and design it with a margin. capacitors that have good voltage and temperature characteristics ar e recommended. do not use it together with cvo1, please insert in the place nearest vs by all means. 16) oscillator for watch dog timer setting the frequency (r rtw) internal oscillation frequen cy can be set by resistor value connecting with rtw. the settable range is 50 khz to 250 khz. the relations of resistor value and oscillation freque ncy is decided like the below figure. oscillator for watch dog timer setting the frequency (foscw vs. rt w) 0 50 100 150 200 250 300 350 0 10 20 30 40 50 60 70 foscw [khz] rtw [kohm] foscw vs rtw foscw = 1839.1 x rtw -0.919 phase margin is a little. phase margin exists. load maximum load output voltage foscw [khz] foscw vs rrtw rtw [k] t 0 downloaded from: http:///
31 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 1.773 1.280 0.984 11.667 8.700 6.920 [ms][ms] [ms] fast ng slow ng nomal tws twf 1. example of wdt setting method in the case of rtw = 24 k , clk edge width becomes 1.773 ms to 6.920 ms when it is normal. symbol min typ max unit foscw 75 100 125 khz twt 0.984 1.280 1.773 ms tws 6.920 8.700 11.667 ms watch dog setting method 17) enwd pin this pin validates the wdt function. usually pulled up inside b y vo2 pin, the wdt function becomes effective. to invalidate the wdt function, please short enwd pin to grou nd. then rstwd pin always becomes h (vo2 output). 18) rstwd pin h (vo2 output) is usually shown w hen the normal operating. the output is changed from h to l when the abnormality is detected in wdt. 19) clk pin clock input pin for wdt . please input the signal from a microcomputer depending on wdt set frequency. please release power on reset in a state of clk = low by all means. 20) t1 , t2 , t3 test pin be sure to connect to gnd. 21) en1 , en2 pin please control en1 from vcc or microcomputer, and en2 from vcc or vo1 or microcompute r. downloaded from: http:///
32 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 power dissipation maximum junction temperature tj is 150 c. if the junction tempe rature reaches 175 c or higher, the circuit will be shut down. please make sure that the junction temperature must not exceed 150c at all time. for thermal design, be sure to operate the ic within the following c onditions. (since the temperatures described hereunder are all guaranteed tem peratures, take margin into account.) 1. ambient temperature ta is less than 125 c. 2. tj is less than 150 c. temperature tj can be calculated by two ways as below. 1. to obtain tj from the ic surface temperature tc in actual use 2. to obtain tj from the ambient temper ature ta = + ? = + ? thermal resistance value ja is varied by the number of the layer and copper foil area of the pcb. see figure 38 for the thermal design. thermal derating characteristics ic mounted on rohm standard board ? board size: 70 mm 70 mm 1.6 mm ? board size: 15 mm 15 mm 1.6 mm ? pcb and back metal are connected by soldering : 4-layer board 70 70 1.6mmt : 2-layer board 70 70 1.6mmt : 2-layer board 15 15 1.6mmt : single ic figure 38. package data of htssop-b24 (reference data) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 25 50 75 100 125 150 power dissipation: pd [w] ambient temperature: ta [ ] 3.99w 2.80w 1.70w 1.10w downloaded from: http:///
33 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 i / o equivalent circuits 1.pvcc , 2.vcc 3.en1 4.t1 , 14.t2 , 17.t3 5.clk 6.rstwd , 7.pg1 , 8.pg2 9.enwd 10.rst2 11.ct 13.vo2 vcc pvcc pgnd gnd en 1 gnd t3 t2 t1 gnd vo 2 gnd clk vo 2 rstwd pg 2 pg 1 gnd vo 2 enwd vo 2 gnd rst2 vo 2 gnd ct vo 2 gnd vs gnd vo 2 downloaded from: http:///
34 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 i / o equivalent circuits - continued 15.en2 16.vs 18.rtw 19.vreg 20.rt 21.fb 22.comp 24.sw en 2 gnd vs gnd rtw gnd vo 2 vreg gnd vcc rt gnd vo 2 fb vreg gnd comp vreg gnd sw pvcc gnd downloaded from: http:///
35 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an extern al diode between the power supply and the ic s power supply pin s. 2. power supply lines design the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the an alog block. furthermore, connect a capacitor to ground at all pow er supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capaci tors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. when the application pulls load current more than 500 ma from dc / dc convertor, be sure to connect to the schottky barrier diode between sw and pgnd. 4. ground wiring pattern when using both small-signal and large-current ground traces , the two ground traces should be routed separately but connected to a single ground at the reference point of the a pplication board to avoid fluctuations in the small-si gnal ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thi ck as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exc eeded the rise in temperature of the chip may result in deterioration of the properties of the chip. the absolute max imum rating of the pd stated in this specification is when the ic is mounted on a 70mm x 70mm x 1.6mm glass epoxy b oard. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expec ted characteristics of the ic can be approximately obtained . the electrical characteristics are guaranteed under the condi tions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that the inte rnal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and dela ys, especially if the ic has more than one power supply. therefore, give special consideration to power coup ling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field m ay cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors comple tely after each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting erro rs ensure that the direction and position are correct when mounti ng the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and output pin . inter-pin shorts could be due to many reasons such as me tal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. downloaded from: http:///
36 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 operational notes C continued 11. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate lay ers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of the p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a parasi tic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physica l damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd vol tage to an input pin (and thus to the p substrate) should b e avoided. example of monolithic ic structure 12. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bia s and others. 13. area of safe operation (aso) operate the ic such that the output voltage, output current, and power dissipation are all within the area of safe operation (aso). 14. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that prevents heat damage to the ic. normal operation should always be within the ics power dissipation rating. if however the rati ng is exceeded for a continued period, the junction temperature (tj) will rise which will activate the tsd circuit t hat will turn off all output pins. when the tj falls below the tsd threshold, the circuits are automatically restored to normal o peration. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set desi gn or for any purpose other than protecting the ic from heat damage. 15. over current protection circuit (ocp) this ic incorporates an integrated overcurrent protection circui t that is activated when the load is shorted. this protection circuit is effective in preventing damage due to sudden and unexpected incidents. however, the ic should not be used in applications characterized by continuous ope ration or transitioning of the protection circuit. n n p + p n n p + p substrate gnd n p + n n p + n p p substrate gnd gnd parasitic elements pin a pin a pin b pin b b c e parasitic elements gnd parasitic elements c be transistor (npn) resistor n region close-by parasitic elements downloaded from: http:///
37 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 ordering information b d 3 9 0 1 2 e f v - ce 2 part number package efv : htssop-b24 packaging and forming specification c: for in-vehicle e2 : embossed tape a nd reel (htssop-b24) marking diagrams htssop-b24 (top view) b d 3 9 0 1 2 part number marking lot number 1pin mark downloaded from: http:///
38 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 physical dimension, tape and reel information package name htssop-b24 downloaded from: http:///
39 / 39 BD39012EFV-C tsz02201-0t2t0am00180-1-2 ? 2013 ro hm co., ltd. all rights reserved. 11.sep.2014 rev.002 www.rohm.com tsz22111 ? 15 ? 001 revision history date revision changes 11 .s ep.2014 00 2 new release downloaded from: http:///
datasheet datasheet notice C ss rev.002 ? 2013 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. if you intend to use our products in devices requiring extremely high reliability (such as medical equipment (note 1) , aircraft/spacecraft, nuclear power controllers, etc.) and whos e malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sales representative in advance. unless otherwise agreed in writ ing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses in curred by you or third parties arising from the use of any rohms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are not designed under any special or extr aordinary environments or conditi ons, as exemplified below. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms products under an y special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet datasheet notice C ss rev.002 ? 2013 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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